A wide range of portable electronic devices including cameras, telephones, game machines, navigation systems, web devices, personal data assistants, digital picture frames, music and video players, etc. use non-volatile memory coupled to a processor through a standardized interface. This approach has also been adopted for some larger embedded systems, such as home entertainment devices, appliances, home and office automation and surveillance systems, and controllers for motors, factory processes, etc. Commonly, the memory is an internal NAND (Not AND) flash memory, but in other cases it is a removable memory card, and in some cases both are used.
Extensive development efforts have greatly improved the cost, reliability, speed and density of flash memory, however, writing to flash is still slow and complicated when compared to most types of random access memory (RAM). In a typical application, the flash memory includes a controller circuit that uses RAM to temporarily store values while the controller performs the complex sequence of operations needed to write to the flash memory. The controller is sometimes referred to as a “Store and Download” or “Page Demanding” system, rather than “Execution in Place”.
Phase-change memory (PCM) has recently been touted as a possible successor to many different types of RAM. It offers true random access, reasonable write speeds, very high read speeds, low power consumption and is non-volatile. While using PCM instead of RAM in the memory controller offers some advantages in a flash memory system, the write speeds and complexity of flash management are not improved.
Currently the most common interface for both embedded and external flash memory is MultiMediaCard (MMC) and the corresponding embedded MMC (eMMC). These are used with CompactFlash, secure digital (SD), mini and micro SD, and MMC cards, etc. eMMC standards allow a single interface to be used with embedded or internal flash memories, removable cards, and even hard disk drives. New standards such as Universal Flash Storage (UFS) also are being developed to allow internal and external flash memory to share a single bus.
In order to simplify the MMC/eMMC interface, the memory controller adapts the NAND interface to the MMC bus interface and also manages tasks specific to NAND technology, such as bad blocks management, error correction and detection, wear leveling algorithms, safe management, and logical to physical block remapping. This reduces the complexity of the rest of the system, but these additional memory controller tasks further slow write and read operations.
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